View SIP12506DMP-TI-E3_3166421.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

vishay siliconix sip12506 document number: 73861 s-70547?rev. d, 26-mar-07 www.vishay.com 1 1-mhz boost converter with ovp for white led applications features ? output voltage range up to 20 v ? fb voltage of 0.208 v ? cycle-by-cycle current limiting with internal frequency compensation ? 2.6 v to 9 v input voltage range ? 1 mhz switching frequency ? > 90 % efficiency ? low r ds(on) : 0.4 (at 3.3 v) ? 1.6 a switch current limit ? < 1 a low shutdown current ? internal soft-start control ? thermal shutdown protection (160 c) ? 6 pin mlp33 package applications ? ccd bias supplies ? tft-lcd displays ? oled driver ? white led backlight ? digital cameras ? portable phones and game devices ? pdas and palm-top computers description the sip12506 is a 1 mhz current-mode boost converter with a feedback voltage of 0.208 v which offers small size and high power conversion efficiency. its input voltage range is from 2.6 v to 9 v, and output vo ltage can go up to 20 v. the internal frequency compensation minimizes number of exter- nal components. the integrated 28 v power switch can carry up to 1.6 a easily providing for 200 ma load current from a 3.6 v input supply. these feat ures make the sip12506 the ideal. the internal soft -start circuit controls the rate of rise of the output voltage during start-up to prevent overshoot. the logic-level shutdown pin can be used to reduce quiescent current to < 1 a and, effectivel y, extend battery life. thermal shutdown at 160 c is also included. the low fb voltage of 0.208 v improves the overall circuit efficiency. these fea- tures and more, make the sip12506 an ideal power solution to white led, oled, lcd, and ccd applications operating from a single or dual cell lithium-ion battery. sip12506 is available in 6-pin mlp33 package and is spec- ified to operate over the in dustrial temperature range of - 40 c to 85 c. typical application circuit figure 1. sip12506 typical application circuit s hd lx fb gnd s ip12506 v out s hd v in 1 f 10 h co u t 1 f mbr05 3 0 v out 1 6 4 3 5 2 10.5 0. 20 8 v l v in figure 2. efficiency curve 40 45 50 55 60 65 70 75 8 0 8 5 90 95 100 0 50 100 150 200 250 3 00 lo a d c u rrent (ma) efficiency ( % ) v = 1 3 v out v = 3 . 3 v in v = 5 v in v = 7.2 v in rohs compliant
www.vishay.com 2 document number: 73861 s-70547?rev. d, 26-mar-07 vishay siliconix sip12506 notes: a. the human body model is a 100 pf capacitor discharged through a 1.5 k resistor into each pin. b. derate 20 mw/c above 70 c. c. devise mounted with all leads soldered or welded to pc board. stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating/conditions for extended periods may affect device reliability. absolute maximum ratings parameter limit unit voltages referenced input voltage v in to gnd - 0.3 to 12 v v out , lx voltages - 0.3 to 28 shd voltage - 0.3 to 12 fb voltage - 0.3 to 12 esd (human body model) a 2kv operating junction temperature 125 c storage temperature - 55 to + 150 c power dissipation (t a = 70 c) b 1100 mw thermal resistance c 50 c/w recommended operating range parameter limit unit voltages referenced input voltage range (v in ) to gnd 2.6 to 9 v shd 0 to v in v out v in to 18 lx 0 to 18.5 fb 0 to 2 operating temperature range - 40 to 85 c specifications parameter symbol test conditions unless specified v in = 5.0 v, v shd = 2 v, t a = 25 c temp min a typ b max a unit input voltage v in full 2.6 9 v switch current limit i limit full 1.1 1.6 2.2 a switch on resistance r ds(on) i sw = 200 ma full 0.4 0.65 shd input high level v shd h v in = 2.6 to 9 v full 1.5 v shd input low level v shd l full 0.5 shd input leakage current i shd 1a feedback voltage v fb 25 c 0.198 0.208 0.218 v full 0.188 0.224 feedback bias current i fb 60 na feedback voltage line regulation v fb / (v fb x v in ) v in = 2.6 v to 9 v full 0.2 %/v feedback voltage load regulation v fb / (v fb x v out ) v out = 10 v 0.15 %/a quiescent current i v fb = 0 v (switching) full 2.1 3.0 ma v fb = 1.5 v (not switching) full 0.35 0.5 v shd = 0 v full 1 a switching frequency f sw full 0.75 1 1.25 mhz maximum duty cycle d max full 86 91 % switch leakage i leak not switching, v lx = 5 v 25 c 1 a full 5 v in
document number: 73861 s-70547?rev. d, 26-mar-07 www.vishay.com 3 vishay siliconix sip12506 notes: a. limits are guaranteed by testing. b. typical values are derived from the me an value of a large quantity of samples test ed during characteriza tion and represent t he most likely expected value of the parameter at room temperature. pin configuration detailed pin description lx: drain of the internal 26 v nmos. connect inductor/ diode to lx. minimize trace area at this pin to keep electro- magnetic interference down to a minimum. v in : the analog and power input of the controller ic. a bypass capacitor is required on this pin. shd : the shd pin provides shutdown control. to allow for normal operation, connect shd to v in . connect shd to gnd to disable the device. fb: the inverting input of the voltage error amplifier. this is internally compared against a voltage of 0.208 v appearing on the voltage error amplifier's non-inverting input. external resistors are connected to this pin to set the regulated output voltage. v out : output voltage sense for over voltage protection and slop compensation . gnd: this pin acts as both the analog ground and the power ground for this part. thermal shutdown t shd 160 c thermal shutdown hysteresis t hyst 25 under voltage lockout t uvlo v in rising full 2.25 2.4 2.55 v uvlo hysteresis t uvlohyst 0.1 ovlo t ovlo v out rising full 18 20 22.5 ovlo hysteresis t ovlohsyst 1 out bias current i vout v out = 5 v 3.2 a specifications figure 3. lx v in s hd gnd fb 1 2 3 4 6 6 lead mlp 33 packa g e top view 5 v out ordering information part number marking temperature range package SIP12506DMP-TI-E3 2506 - 40 c to 85 c mlp33-6 pin description pin number name function 1 lx drain pin of the internal switch. 2v in input power pin. 3shd logic controlled shutdown input. shd = high: normal operation. shd = low: shutdown. 4 fb voltage feedback pin. 5v out output voltage pin. 6 gnd signal and power ground.
www.vishay.com 4 document number: 73861 s-70547?rev. d, 26-mar-07 vishay siliconix sip12506 typical characteristics i (active) vs. temperature switch current limit vs. temperature feedback voltage vs. temperature - 50 - 25 0 25 50 75 100 125 inp u t su pply c u rrent (i ) ( a) temper a t u re (c) v in = 9 v v in = 2.6 v v in = 5 v v in 200 250 3 00 3 50 400 450 500 550 600 temper a t u re (c) - 50 - 25 0 25 50 75 100 125 1 1.2 1.4 1.6 1. 8 2 s witch c u rrent limit (a) v in = 5 v to 9 v v in = 2.6 v 0.1 8 5 0.19 0.195 0.2 0.205 0.21 0 . 21 5 - 50 - 25 0 25 50 75 100 125 feed ba ck volt a ge (v) temper a t u re (c) i (active - switching) vs. temperature switching on resistance vs. temperature temper a t u re (c) 0.5 1 1.5 2 2.5 3 - 50 - 25 0 25 50 75 100 125 v in = 9 v v in = 2.6 v v in = 5 v inp u t su pply c u rrent (i ) (ma) v in temper a t u re (c) 0 0.1 0.2 0. 3 0.4 0.5 0.6 0.7 0. 8 0.9 - 50 - 25 0 25 50 75 100 125 r ( ) d s (on) v in = 5 v to 9 v v in = 2.6 v v in v in
document number: 73861 s-70547?rev. d, 26-mar-07 www.vishay.com 5 vishay siliconix sip12506 typical waveforms efficiency vs. led current - driving 3 series leds steady state condition v in = 3.6 v, 4 series leds, i load = 20 ma start-up under open-load condition v in = 3.6 v, open load 50 55 60 65 70 75 80 85 90 95 25811141720 led current (ma) efficiency (%) v = 4.2 v in v = 3.6 v in v = 3.2 v in 400 ns/div v out , 20 mv/div (ac coupled) v in , 20 mv/div (ac coupled) v lx , 10 v/div inductor current, 100 ma/div 200 s/div v lx , 20 v/div v out , 5 v/div (ac coupled) inductor current, 500 ma/div v en , 5 v/div efficiency vs. led current - driving 4 series leds start-up v in = 3.6 v, 4 series leds, i load = 20 ma 50 55 60 65 70 75 80 85 90 95 25811141720 led current (ma) efficiency (%) v = 3.2 v in v = 3.6 v in v = 4.2 v in v out , 5 v/div (ac coupled) v en , 5 v/div inductor current, 500 ma/div v lx , 10 v/div 100 s/div
www.vishay.com 6 document number: 73861 s-70547?rev. d, 26-mar-07 vishay siliconix sip12506 functional block diagram detailed operation description: the sip12506 is a current m ode, internally compensated, step-up switching converter th at operates at a fixed fre- quency of 1 mhz. the current mode topology allows for fast transient response over a wide input range and provides a real-time, cycle-by-cycle current limiting function. the opera- tion of the converter can be described through the interaction of two separate internal loops: the current sense loop and voltage sense loop. within the current sense loop, the switch fet current is mon- itored by sensing the voltage across an internal current sense resistor which is fed to the inputs of both the current limit amplifier and the pulse width modulation (pwm) com- parator. at the beginning of each switch cycle, the oscillator sets the s-r latch thereby turning on t he fet. as current through the switch increases, so does the voltage drop across the sense resistor. this voltage is summed with the ramp coming from the ramp generator and applied to the input of the pwm com- parator. when this ramping voltage exceeds vc (the output of the gm amplifier), the latch changes state and turns off the fet. the slope of the ramp gener ator is proportional to volt- ages on the v in and v out pins, therefore, any sudden changes in input or output voltage can be corrected and accommodated for on a cycle-by- cycle basis. if the fet cur- rent surpasses the current limit threshold, the current limit comparator will unconditionally turn off the internal power switch. at the beginning of the next oscillator cycle, the switch is allowed to turn on again. the voltage feedback loop works by monitoring the led drive current through a resistor divider on fb and comparing that voltage with an internal reference voltage (v ref ). if the led current falls below the se t current, the voltage on the feedback pin will drop slightly below vref causing vc to increase. this will keep the pwm comparator's output high for a greater portion of an osc illator cycle, thus ensuring that the fet will stay on longer. this, in turn, will allow more cur- rent to be delivered to the load. following similar logic, should the led current become higher than the set current, fb voltage will increase above vref, the converter will decrease its duty cycle, which will lessen the energy deliv- ered to the load at each cycle, and thereby, reduce led cur- rent and maintain desired brightness. in essence, by modifying the on time of the switch, the pwm comparator continually sets the correct maximum current through the fet to regulate the led current to a desired value. power dissipation considerations: an important consideration when designing power convert- ers is the maximum allowable power dissipation of a part. the maximum power dissipation in any application is dependant on the maximum junction temperature, t j(max) = 125 c, the junction-to-ambient thermal resistance for the mlp33-6 package, j-a = 50 c/w, and the ambient temperature, t a , which may be formulaically expressed as: it then follows that, assuming an ambient temperature of 70 c, the maximum power dissipation will be limited to about 1.1 watts. in the event that the power dissipation exceeds the value specified above and the die temperature reaches 160 c, the internal thermal protection circuitry will ensure safe operation by turning off the internal fet, thereby maintaining junction temperature at a safe level. in this state, only the system monitor circuitry will be active. once the temperature of the chip drops below 135 c, the chip re-enters soft-start mode and resumes normal operation. figure 4. internal block diagram gm + - pwm - + o s cill a tor fb v in lx gnd driver + - r r r s q ff r a mp gener a tor c u rrent limit comp a r a tor therm a l s h u tdown v out 0.20 8 v reference s oft s t a rt s h u tdown control c u rrent s en s e vc rc cc1 cc2 s hd 50 125 j (max) (max) a j-a a t t t p - = - =
sip12506 vishay siliconix document number: 73861 s-70547?rev. d, 26-mar-07 www.vishay.com 7 diode selection: a schottky diode is recommended for use as the external rec- tifier. schottky diodes are typically preferred in dc-dc con- version applications because of their low forward voltage drop and fast recovery time, which allows for high frequency switching. in choosing a di ode, ensure that the diode's reverse breakdown voltage exceeds the intended v out of design and that its current rati ng is greater then the peak inductor current. for applications in which less than 0.5 a of average output current is requi red and output voltage is less than 15 v, a diode such as the mbr0520 is recommended. for v outs higher than 15 v, a 30 v diode such as the mbr0530 should be considered. input capacitor selection: the input bypass capacitor acts as an energy reservoir that satisfies the transient inductor current needs each time the switch turns on. in effect, the input capacitor is responsible for reducing the input voltage ri pple and the amount of emi that is inevitably passed to other circuitry on that line. for this purpose, a 4.7 f ceramic capacitor is recommended. if pre- ferred, tantalum capacitors may be used instead of ceramics. output capacitor selection: to curb output voltage ripple, a multi-layer ceramic capacitor should be used as the output filter capacitor. ceramic capac- itors are favored for their low esr (equivalent series resis- tance) and high resonance frequency which makes them ideal for high frequency switching converters. a high esl (equivalent series inductance) can give rise to ringing in the low megahertz region and a high esr could reduce phase margin and potentially cause inst ability of the design. in addi- tion, the ripple current flowing through the capacitor's esr causes power dissipation and heats up the capacitor inter- nally. if the ripple current ratings of the capacitor are exceeded, the excessive tem perature could shorten the expected life of the capacitor. if a high value capacitor is required for improved transient response, to keep component costs down and to save pc board real estate, tantalum capacitor may be used in parallel with ceramics. if the maximum tolerated ripple current (i p-p ) and ripple voltage ( v o ) design specifications are known, the maximum tolerated esr on t he output capacitor and its value can be calculated using the following formulas: where i out (max) is the maximum output current and d max represents the maximum duty cycle. duty cycle calculation: in continuous mode of operat ion, the maximum duty cycle of a boost switching regulator determines the maximum amount of boost (v out /v in ) attainable and can be calculated using the expression where v diode is the forward bias voltage of the schottky diode and vsw denotes the voltage drop across the internal switch and can be expressed as the above equation yields only an approximation of the duty cycle since it ignores power lo ss terms resulting from wire losses in the inductor, switching losses of the internal fet, and capacitor ripple current losses due to their inherent non- zero esr. a more accurate es timate of the duty cycle can be determined by and by using the provided efficiency curves to approximate efficiency for a given input and output voltage. inductor selection: an inductor is one of the energy storage components in a converter. choosing an induct or means specifying its size, structure, material, inductan ce, saturation level, dc-resis- tance (dcr), and core loss. choosing the right inductor is not a simple task and involves tradeoffs in performance. the following are some key parameters that should be focused on. in pwm mode, inductance has a direct impact on the rip- ple current. the peak-to-peak inductor ripple current can be calculated as where vsw is the voltage drop across the switch in its on state, fsw is the s witching frequency, an d d is the duty cycle. higher inductance means lower ripple current, lower rms cur- rent, lower voltage ripple on both input and output, and higher efficiency, unless the re sistive loss of the inductor dominates the overall conduction loss. however, higher inductance also means a larger inductor size and a slower transient response. for fixed line, load, and frequency condi- tions, higher inductance results in a lower peak current for each pulse and a higher load capability. the saturation current is another important parameter in choosing inductors. note that the saturation levels specified in data sheets are maximum currents. for a dc-dc con- verter operating in pwm mode, it is the maximum peak inductor current that is relevant, and which can be calculated using these equations: ? ? ? ? ? ? ? ? + - = 2 1 (max) p-p out (max) max out i i d 1 v e s r out s w max out (max) out (min) v f d i c = (max) diode out v v d + = - in v diode out v v + s w v - l(peak) d s (on) i r v= s w x in efficiency 1 - d= x v out v sw sw in p p f l v v d i ? = ? ) (
www.vishay.com 8 document number: 73861 s-70547?rev. d, 26-mar-07 vishay siliconix sip12506 this peak current varies with inductance tolerance and other errors, and the rated saturation level varies over tempera- ture. so a sufficient design margin is required when choosing current ratings. a high-frequency core material, such as ferrite, should be chosen, the core loss could lead to serious efficiency penal- ties. the dcr should be kept as low as possible to reduce conduction losses. layout considerations: in high frequency switching regulators such as the sip12506, great attention must be given to the layout pro- cess in order to ensure stable operation and minimize noise. since most power traces in st ep up converters carry pulsat- ing current, energy stored in trace inductance during the pulse can cause high-frequency ringing with input and output capacitors. this effect can gene rally be curbed by minimizing the length and increasing the width of power traces. to minimize stray capacitance and even more importantly, parasitic trace inductance, all components must be kept as close to the switcher as poss ible. of special importance, is the path between the switching node lx, d1, c2, and ground of the regulator; the length of th is path must be kept as small as possible since any parasitic inductance in series with the diode and output capacitance will increase noise and pro- duce ringing in the circuit. pulsating currents in the ground trace can cause voltage drops due to trace resistance and cause ground bounce. for this reason, it is strongly recommended to use a separate ground plane. v bias should be used at the negative ends of capacitors c3 and c2 as well as the device gnd pin to con- nect to the ground the plane. the feedback components (r1, r2) should be kept close to the fb pin and the trace connecting the negative end of r2 to ground should be kept thin in order to minimize noise injec- tion into the feedback pin. as an example, figure 5 demon- strates a recommended layout of components. it is urged that this layout be followed closely as possible to obtain best performance. start up and soft-start: when voltage is applied to the v in pin, the undervoltage lock- out (uvlo) circuit prevents the controller's output switch and oscillator circuit from turning on until the voltage on the v in pin exceeds 2.4 v. provided the v in pin is above this thresh- old, when shd pin is raised high, soft-start is initiated. soft- start is achieved by slowly ramping up the internal reference. once the soft-start time has elapsed, sip12506 enters into a normal state of operation. th e converter then operates con- tinuously unless the voltage on v in drops below 2.4 v or shd is set low. uvlo hysteresis prevents the converter from dropping in and out of start-up, unintentionally locking up the system. led current control: the sip12506 is a white led driver. the low feedback volt- age of 0.208 v is designed to reduce losses outside of the white leds and thus improve overall circuit efficiency. the led current is set by the small sense resistor on fb and can be calculated using the following expression: in order to have accurate led current, use of 1 % precision resistor is recommended. as shown in figures 6 and 7, the sip12506 can be used to drive four leds in series or to drive parallel strings of leds. figure 5. 2 p l( a vg) peak i i i -p + = d i , i out l( a vg) - = 1 figure 6. sip12506 driving four leds figure 7. sip12506 driving six leds fb fb ref led r r v i 208 v . 0 = = lx fb gnd s ip12506 1 f l 10 h c out 1 f mbr05 3 0 vout 1 6 4 3 5 2 10.5 0. 20 8 v s hd s hd v in v out v in lx fb gnd s ip12506 1 f l 10 h c out 1 f mbr05 3 0 v out 1 6 4 3 5 2 0. 20 8 v v out v in s hd s hd 10.5 10.5 v in
sip12506 vishay siliconix document number: 73861 s-70547?rev. d, 26-mar-07 www.vishay.com 9 white led brightness control figures 8 and 9 delineate two possible brightness control schemes. in figure 8, a pwm signal is injected into the shut- down pin. the average led current is proportional to the duty cycle of the pwm signal and thus, the brightness will vary from low to high as the duty cycle of the pwm signal is increased. the frequency of the pwm signal has to be low enough to allow the part to undergo soft-start and fully power up at each cycle. a frequency of 100 hz to 500 hz is, there- fore, recommended. the magnitude of the pwm signal should be higher than the maximum enable voltage of shd pin, in order to let the dimming control perform correctly. in figure 9, a more analog approach to brightness con trol. as the control voltage v ctrl is increased from 0 v, the voltage drop across r2 and r3 increases driving voltage on node a low thereby reducing current through the white leds and dimming brightness. reducing v ctrl to about 0 v, will turn the leds fully on with 20 ma of current. the equation for the led current can be expressed as figure 10 demonstrates a more practical approach for dim- ming control which is really the synthesis of the two ideas demonstrated above. in this approach, a filtered pwm signal acts as a dc voltage to control the brightness of the leds. it is recommended that pwm signal with frequency higher than 22 khz be used. figures 11 and 12 illustrate other variations of the previously mentioned ideas. figure 8. sip12506 driving four leds lx fb gnd s ip12506 100 - 500 hz 1 f l 10 h c out 1 f v out 1 6 4 3 5 2 0. 20 8 v mbr05 3 0 s hd 10.5 v o v in v in figure 9. white led driver with adjustable brightness - + = 15 ) 20 8 v . 0 ( 3 2 15 20 8 v . 0 ctrl led v r r i lx fb gnd s ip12506 4.7 f 10 h c out 1 f v out 1 6 4 3 5 2 0.20 8 v 15 10 k 20 k r1 r 3 r2 a mbr05 3 0 v out v in s hd s hd v in v ctrl figure 10. white led driver with adjustable brightness control using a filtered pwm signal lx fb gnd s ip12506 4 .7 f 10 h c out 1 f v out 1 6 4 3 5 2 0.20 8 v r1 r 3 r2 a c dc 0.1 f r dc 100 k pwm > 22 khz mbr05 3 0 s hd s hd v out v in 20 k 10 k 15 v in
www.vishay.com 10 document number: 73861 s-70547?rev. d, 26-mar-07 vishay siliconix sip12506 open-circuit protection: in the event of an output open circuit (e.g. when the leds are either disconnected form the ou tput or an led fails), the feedback voltage will become zero causing the sip12506 to go to maximum duty cycle. this would generally result in a high output voltage and, possibly, cause the voltage on the lx pin to exceed it's absolute maximum rating and damage the part. however, the sip12506 has a built-in over-volt age protection circuitry that will clamp the output to 20 v and guar- antee safe operation under open-circuit conditions. vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon tech- nology and package reliability represent a com posite of all qualified locations. for related documents such as package/tape dra wings, part marking, and reliability data, see http://www.vishay.com/ppg?73861. figure 11. white led driver with adjustable brightness control using a filtered pwm signal lx fb gnd s ip12506 4 .7 f 10 h c out 1 f v out 1 6 4 3 5 2 0.20 8 v r1 r 3 r2 c dc 0.1 f r dc pwm > 22 khz r4 r5 r6 s hd s hd v in v out mbr05 3 0 100 k 20 k 10 k 15 v in figure 12. white led driver with a fixed output and ad justable brightness control using a filtered pwm signal lx fb gnd s ip12506 4 .7 f 10 h c out 1 f v out 1 6 4 3 5 2 0.20 8 v r 3 r2 r1 > 22 khz r4 r5 r6 pwm mbr05 3 0 v in v out s hd s hd v in
document number: 91000 www.vishay.com revision: 18-jul-08 1 disclaimer legal disclaimer notice vishay all product specifications and data are subject to change without notice. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, ?vishay?), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. vishay disclaims any and all li ability arising out of the use or application of any product describ ed herein or of any information provided herein to the maximum extent permit ted by law. the product specifications do not expand or otherwise modify vishay?s terms and conditions of purcha se, including but not limited to the warranty expressed therein, which apply to these products. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of vishay. the products shown herein are not designed for use in medi cal, life-saving, or life-sustaining applications unless otherwise expressly indicated. customers using or selling vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify vishay for any damages arising or resulting from such use or sale. please contact authorized vishay personnel to obtain written terms and conditions regarding products designed for such applications. product names and markings noted herein may be trademarks of their respective owners.

▲Up To Search▲

Price & Availability of SIP12506DMP-TI-E3

	To Download SIP12506DMP-TI-E3 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .